The device requires a single +5 volt or -5 volt supply and typically consumes 650 mW of power while driving two 75 Ohm loads. The 28 pin PLCC packaging assures a small footprint for the complete encoder function.
| Input | Output | |
|---|---|---|
| Throughput | 100-400 Mbps (10-bits mode) | 100-400 MBaud |
| # bits | 8 or 10 | 1 (single-ended and differential) |
| Frequency | 10-40 MHz | |
| Signal levels | TTL and CMOS | 800 mV p-p (SMPTE level) |
| Synchronous/asynchronous/sync with idles | synchronous |
| Input data needs coding | no |
| Error detection | no |
| Power consumption | 650 mW |
| Power supply voltage | +5 V |
| Package size | 28-pin PLCC / 1.54 cm2 / 12.4 x 12.4 x 4 mm |
| Technology | Bipolar, ft=12 GHz |
| Radiation hardness | unknown |
| Price |
The input of the GS9022 uses the SMPTE-standardised Bit-Parallel Digital Interface, which may be up to 40 MHz, which matches the LHC global clock. Care has to be taken that the chip has an hold time requirement of minimum 3 ns. The setup time is also 3 ns minimum.
The input data can be given directly, as the chip itself is performing the coding. The only thing to watch out is that there are some reserved words. These reserved words are used by the receiver to make the byte synchronisation. In 10-bits mode these words are 0000-0003 and 3FC-3FF in the 10-bit mode and 00 and FF in the 8-bit mode. One can disable this sync detect feature on the GS9022, but probably you will have troubles doing your manual sync detection on the receiver side. I believe that the some of the sync words are filtered out by the receiver chips (GS9005/GS9000 combination).
There are easy-to-use crossbar switch components available that can be used in for applications requiring redundancy.
CERN - High Speed Interconnect
Erik Van der Bij - 22 January
1998 - Disclaimer