Vitesse VSC7214
Multi-Gigabit Interconnect Chip

MANUFACTURER'S DEVICE DESCRIPTION

The VSC7214 is a quad 8-bit parallel-to-serial and serial-to-parallel transceiver chip used for high bandwidth interconnection between busses, backplanes, or other subsystems. Four Fibre Channel compatible transceivers provide up to 8.32 Gb/s of duplex data transfer.
Each channel can be operated at a maximum data transfer rate of 1040Mb/s (8 bits at 130MHz) or a minimum rate of 784Mb/s (8 bits at 98MHz). For the entire chip in duplex mode, the aggregate transfer rate is between 6.3Gb/s and 8.3Gb/s. The VSC7214 contains four 8B/10B encoders, serializers, derserializers, 8B/10B decoders and elastic buffers which provide the user with a simple interface for transferring data serially and recovering it correctly on the receive side.

TRANSMITTER FEATURES

	Input	Output
Throughput	4 * 784-1040Mbps	4 * 980 - 1300 Mbaud
# bits	4 * 8 bits	4 (differential)
Frequency	98-130 MHz
Signal levels	TTL	PECL

Synchronous/sync with idles/asynchronous	synchronous with idles; 4 channels can be asynchronous from each other, but with limitations
Input data needs coding	no
Error detection	yes (coding errors)
Power consumption	4300 mW
Power supply voltage	+3.3 V
Package size	160-pin Thermally Enhanced PQFP / 9.7 cm² / 31.2x31.2x4 mm
Technology	unknown
Radiation hardness	unknown
Price

DESCRIPTION

INTERFACING

The VSC7214 is a four-channel serialiser component meant for Fibre Channel applications. The chip has differential serial outputs using PECL levels. It also has a four-channel deserialiser built in, which probably is not needed for HEP applications.

The input of the VSC7214 is 8-bit uncoded data. Special characters can be sent by asserting a seperate pin for each channel. Those characters can be used for synchronisation, as idle words or for sending control words.

The main problem for LHC applications is that the input frequency should be between 98 MHz and 130 MHz, which does not include the 40 MHz commonly used in LHC. This is due to the Phase Locked Loop circuitry in the VSC7214 that is optimised for Fibre Channel applications.
Also it is necessary to send from time to time the COMMA or IDLE character which are used to synchronise the link. Related to this is that the four channels of the VSC7214 are not independent; all four transmit channels should run from exactly the same clock or otherwise one should make sure that all four transmit channels transmit IDLE characters at the same time. This is needed as all four receivers share a common output clock and for synchronisation purposes IDLE characters can be removed or inserted. Those characters will be removed or inserted from all channels at the same time.

RADIATION HARDNESS

No data available.

OTHER

None

ISSUES FOR LHC APPLICATIONS

frequency range of 98-130 MHz does not include 40 MHz.
idle and comma characters need to be inserted for synchronisation
idle characters can be removed by receiver
too high bandwidth for most applications
issues about independency of the four channels
chip contains also deserialisers that won't be used in the front-end logic
high power consumption
radiation hardness unknown

DOCUMENTATION

VSC7214 Multi-gigabit Interconnect IC

RELATED COMPONENTS

Vitesse Standard Products

USERS

No known users

CONTACT

Vitesse

CERN - High Speed Interconnect
Erik Van der Bij - 28 January 1998 - Disclaimer

Vitesse VSC7214 Multi-Gigabit Interconnect Chip