In Section 7.3, we derived that an
interrupt takes as much time as it takes to send a 270 byte
packet. Knowing that data is sent at 8.3 Mbytes/s, we can
derive that it takes 32.5 
s to service an interrupt.
This interrupt service time can be checked against the CPU load for long messages. For long messages, the processor load depends only minimally on the task switching time. In this case, the CPU load is caused by interrupts and memory bandwidth usage.
Consider the Comms1 communication of long messages in 4096 byte
packets. Knowing that an interrupt takes 32.5 s to
handle, we can conclude that on an average, communicating a single
byte requires 32.5 / 4096 = 7.93 ns CPU time. It requires
65800 s CPU time every second to sustain the full data
rate of 8.3 Mbytes/s. The CPU load due to interrupts for long
messages and packet size 4096 is therefore 6.6 %. This
6.6 % is close to the 7.1 % observed. The
difference can be explained by the memory bandwidth usage, and cache
disturbance due to the interrupts.