MFCC-ODIN

Optical G-LINK interface for MFCC

LDC-D-40-B-3.3-128


Top view
Bottom - top direct - bottom direct - mock-up
(Circuit number 680-1169-100)

DESCRIPTION

MFCC. The nose plugs into
the connector on the left
The ODIN 'nose' is a plug-in card for the CESMFCC (Multifunctional Computing Core), a full functional processor board in a PMC form-factor. The nose gives the MFCC a 128 MB/s input to ODIN S-LINK Source Cards. 

The nose contains the same hardware (HDMP-1032/1034 G-LINK chips and optical transceiver) as a single channel ODIN, but with the Altera removed. The S-LINK protocol is implemented as a core in the "front-end FPGA" that is on the MFCC. 

Only the S-LINK receiver logic will be implemented, but in fact with the right software implemented in the "front-end FPGA", the hardware can also be used to implement transmitter logic.

General features


STATUS

Hardware

28 March 2000 After succesfull tests of the S2P2 with MFCC, first discussions were held about building a nose for the MFCC.
 10 July 2000 Schematics ready. PCB design will start 14 August
17 August 2000 PCB design will start 18 August
31 August 2000 PCB and front-panel design ready. 10 PCBs ordered, 5 front-panels, components for 3. PCB  manufacuring ready by the beginning of October.
4 October 2000 10 PCBs received. Project presented at ATLAS ROD Workshop
23 October 2000 Three cards mounted

Firmware

28 March 2000 Stefano Veneziano will implement ODIN firmware in MFCC front-end FPGA. Erik van der Bij will provide the ODIN core for this.


DOCUMENTATION


CONTACTS


CERN - High Speed Interconnect - S-LINK
Erik van der Bij - 23 October 2000