S-LINK News 1996

S-LINK installed in ATLAS

9 December 1996. A Fibre Channel implementation of the S-LINK has been installed in a test setup of the ATLAS experiment. It is installed in the so-called "prototype-1" system, which is a vertical slice of the full data acquisition system of ATLAS. In this system the S-LINK will send the data from the Read-out Drivers (ROD) to the Read-out Buffers (ROB). This is the first set-up where a complete S-LINK is installed.

S-LINK will be presented at IEEE NSS and DAQ'96

30 October 1996. The S-LINK specification and project will be presented at two Physics conferences. "S-LINK, a Data Link Interface Specification for the LHC Era" is the title of the poster at the 1996 IEEE Nuclear Science Symposium in Los Angeles, while Robert McLaren will present "An application of S-LINK, a data link interface specification, in the ATLAS readout system" at the Second International Data Acquisition Workshop DAQ'96 to be held in Osaka, Japan. Those presentations, together with the presentation "Development of FCS-Link Interface Cards" given last month at the second Workshop on Electronics for LHC in Budapest, will give a major push to S-LINK as it is the first time it will be presented at major physics conferences.

MATCH: radiation hard S-LINK

30 October 1996. The MATCH version of the S-LINK is radiation hard as the MATCH chip is made in GaAs. The design of this card has now received a good boost as they would like to use an S-LINK in the next ATLAS muon test beam for reading out the Rome/Pavia MDT chambers.

Fibre Channel S-LINK card tested

30 October 1996. The Fibre Channel S-LINK card is tested and functioning. Currently eight boards have been built, so four complete links can be made. Another two cards are waiting to be mounted, while components have been ordered for another twenty cards. All fifteen links that can be built with this, are already reserved for users around the world. We are working with a company to get the cards produced commercially.

SLITEST: stand-alone Link Test Bench

30 October 1996. The PCBs for the SLITEST have arrived. Mounting will be done in the following weeks. With the SLITEST, an SLIDAD and a SLIDAS, Link Cards can be tested in stand-alone. Error counters will count the different types of errors that occured on the link while the SLIDAS is sending data. Apart from this mode of using SLITEST, it can also be used to make a "dead-end" on an S-LINK. For this you need to plug the Link Destination Card together with a SLIDAD on the SLITEST. When the SLITEST web pages will be made, we will put some nice pictures of the different possibilities of the boards.

SLATE Event Data Generator tested

30 October 1996. The S-LINK daughterboard for the SLATE, SLATE2SLINK, has been tested at CERN. With a SLATE and this card, event data can be generated and sent out over three Link Source Cards. Multiple SLATEs can be controlled by sophisticated software, keeping the cards synchronised as well. Currently three prototype cards are built, while an mechanically improved version will be ready before the end of the year.

PCI to S-LINK cards developed

30 October 1996. The PMC to S-LINK and S-LINK to PMC cards are used mostly in the VME environment. As people are getting interested in using standard PCs or workstations, we have designed PCI versions of the S-LINK motherboards. The PCB design is finished. Basically only the form-factor of the boards has changed, so the debugging time is expected to be relatively short.

Fibre Channel S-LINK testing starts

29 August 1996. Today the Fibre Channel implementation of S-LINK cards will be mounted. In total 10 PCB's will be produced, which makes that five complete links can be expected in a rather short time.

New production arrived

29 August 1996. The company INCAA Computers will produce the S-LINK boards developed at CERN. They are just starting up the production, so it will take another 4 to 6 weeks before they will be able to deliver cards. Therefore CERN has made a small production of the PMC to S-LINK card, S-LINK to PMC card, SLIBOX and SLIDAD. Five PCB's of each have arrived and mounting will start next week. All PMC cards except one are already reserved by S-LINK users (ATLAS) and S-LINK designers (Optobus and G-LINK).

ATLAS Level-2 Trigger demonstrator gets help

2 August 1996. The ATLAS Level-2 Trigger demonstrator A group received during one day advice on how to implement and test the S-LINK inputs for the ENABLE++ machine. The meeting was held at the University of Jena (Germany) where also people from the University of Mannheim, from Poland and from CERN were present. The general conclusion of the meeting was that it will be easy to implement the S-LINK inputs and that the group does not have to worry about the link implementations. In the final demonstrator system 18 S-LINK inputs will be needed. A smaller scale system, using 3 Parallel Electrical S-LINKs with a SLATE2SLINK providing the data, is supposed to be ready by the end of 1996.

INCAA Computers sells S-LINK cards

9 July 1996. Many users and link designers would like to get their hands on PMC/S-LINK interfaces or the test adapters. Those cards, designed by CERN, are made only in a small quantity as part of the development process. As CERN cannot produce in large quantity, nor can do the maintenance of those cards, the Dutch company INCAA Computers will produce and sell them. By the end of August you will be able to get the PMC to S-LINK card, S-LINK to PMC card, SLIBOX and SLIDAD from INCAA. Until that time you should contact Erik van der Bij at CERN for the availability of those cards.
For the sales of Link Source Cards and Link Destination Cards, please contact the responsible persons for those designs.

How to test your link cards?

5 July 1996. As the different groups that are designing S-LINK cards are getting closer to debug their hardware, it opens the question on how those link cards can be tested. Currently the best way to test the cards is to get a PMC to S-LINK card, an S-LINK to PMC card and a SLIBOX (the S-LINK extender). Those cards can be obtained from CERN and soon from the company INCAA. With those cards you may send and receive data at rates up to 65 MByte/sec. The SLIBOX is used to easily probe the S-LINK signals and to interface to an HP Logic State Analyzer.

For the test software, you have two options. You may use the software that is written by Frederic Pennerath at CERN (see PMC to S-LINK card). This software running under LynxOS was originally meant to test the PMC S-LINK cards, but it can be used to test Link Cards as well. It is running on the RIO2 from CES. Both the hardware and the operating system are relatively expensive, but it is a standard platform used in the ATLAS experiment. The second solution is to use Linux software developed by Marton Zsenei from KFKI-RMKI in Hungary. This software is specifically written for testing link cards and is based on the TCL/TK toolkit. A standard PC with PCI bus may be used to run this software, but a PCI to PMC adapter is needed to be able to use the PMC-based S-LINK cards. Both software packages will be ready by the end of July and will be available via the web. Another solution is to write your own software based on the source codes and .h files of the programs described above.

Trigger supervisor advancing well

4 July 1996. The Trigger Supervisor project who received a PMC/S-LINK card and the SLIDAD only a three weeks ago is advancing really well as the following extract of an e-mail from John Dawson from Argonne National Laboratory shows:

"We received the S-LINK card that Rudy Bock brought when he was here and have run it with our
Motorola mvme1604 under OS9000. It came up with no problems whatever and we have had transfers
through the pci port at rates up to 40 MB/s."

Japanese G-LINK implementation of S-LINK debugging starts

4 July 1996. The third S-LINK development kit is taken out of CERN to Japan by Masa Nomachi. The set of cards will be used by the G-LINKdesign group contains a PMC to S-LINK card, an S-LINK to PMC card and a SLIBOX (the S-LINK extender). This kit allows the Japanese group to start debugging their cards. As computing platform they will use a FORCE processor and a RIO2 from CES, both running LynxOS.

S-Link Distributor for ATLAS Trigger Supervisor

12 June 1996. Argonne National Laboratory in collaboration with Michigan State University will build the level 2 trigger (T2) Supervisor and Region of Interest Builder for the ATLAS trigger system. On the input to the Supervisor there is an S-LINK connection to the level 1 system that provides a transmission per event with the level 1 data needed by the Supervisor. The input S-LINK distributor buffers and dispatches this data (which arrives at a maximum of 100 kHz rate) to one of several PMC cards attached to the Supervisor processors (one PMC per processor). The processors send requests to the ROB's via the same PMC connection. The S-LINK distributor buffers the requests and intelligently fans the requests out to a number of S-LINK channels (one per ROB crate in the current scheme).

Last week, Argonne has received from CERN a PMC to S-LINK interface including software and a SLIDAD. This allows the Trigger Supervisor team to already now perform timing tests and to understand bottlenecks in the trigger supervisor I/O system based on S-LINK.

PMC to S-LINK interface software on the web

3 June 1996. The test software for the PMC to S-LINK interface is available on the web. The user guide of the software and the installation procedure are all very well written by Frederic Pennerath from CERN. The first user of the software outside CERN will be Bob Blair from Argonne National Laboratory, who is working on the Trigger Supervisor for the ATLAS experiment. Bob is planning to program the interface directly to minimise the latency of the S-LINK transfers.

Want to see the first S-LINK?

28 May 1996. If you want to see the first S-LINK, take a look at the Link Source Card and Link Destination Card from Osamu Sasaki from KEK.

Cheap S-LINKs: getting closer

28 May 1996. Jolanta Olszowska from the Institute of Nuclear Physics in Krakow, Poland is designing a cheap version of the S-LINK. Her parallel electrical version of the S-LINK will be based on transmission over a cheap standard SCSI cable using LVDS CMOS Differential Line Drivers/Receivers. The design of this cheap version of the S-LINK, which is able to send data at a rate of 50 MByte/sec, is expected to be finished by the end of June.

G-LINK PCB ready

20 May 1996. The printed circuit board of the G-LINK based S-LINK is ready. Osamu Sasaki will start debugging his cards still this week. He has asked for an S-LINK development kit so he can do extensive testing. For a description of Osamu's card, look at his G-LINK web page in Japan.

Simple S-LINK to PMC PCB ready

20 May 1996. Not only the G-LINK PCB has arrived, but also the one of the Simple S-LINK to PMC card. This card will extensively be used to debug the various implementations of the link cards. Mounting of the components will start next week.

S-LINK PCBs: Things to think of

20 May 1996. Most S-LINK designers are now almost in the phase of designing the printed circuit board. As the S-LINK specification has undergone some changes since it's first release at the end of last year, there are a few things to take extra care of.
Check that:

"This product includes technical information created and made available by CERN"


First S-LINK development kit is sent out of CERN

10 May 1996. The first S-LINK development kit is sent out of CERN. The set of cards that will be used by the Fibre Channel S-LINK design group contains a PMC to S-LINK card, a SLIBOX (the S-LINK extender) and a SLIDAD (a Link Source Card to test Front-end Motherboards). This kit allows the Hungarian group to start writing automated test programs and a Linux driver for the S-LINK. Furthermore they received on loan a PCI to PMC adapter which allows them to use cheap PCI PCs to develop the software. To be able to trace the PMC activity, they will use an PMC preprocessor with HP Logic State Analyzer adapter and software.

SLIDAD ready

3 May 1996. The SLIDAD, a board to test Front-end Motherboards with, is fully tested now. The board contains LEDs that show the values of all datalines and other S-LINK signals. It also contains logic state analyzer connectors with which all S-LINK signals can be seen on the screen of an Hewlett Packard 16500 analyzer. A diskette with a full analyzer setup, with both timing and state analyzer setups is available as well. The same setup is used with the SLIBOX, the S-LINK extender card.

TestSPS: software for the PMC to S-LINK card

3 May 1996. testSPS is a simple menu-driven program to excercise the Simple PMC to S-LINK card. It is written by Frederic Pennerath and David Francis as part of the project to write a fast driver running under the LynxOS operating system. Currently it is being used to test the Simple PMC to S-LINK card, the SLIDAD and the HP logic state analyzer setups. The source code of the program is available for people who would like to program themselves the PMC to S-LINK card.

S-LINK spec gets copyright and some clarifications

3 May 1996. A new version of the specification is available. The only changes are that a timing diagram and timing parameters are added for the test mode at the LSC and that an S-LINK copyright statement is added. The main clauses of this copyright statement are that use or reproduction of the S-LINK specification shall be for the licensee's scientific use only and that any use for commercial purposes is subject to prior written consent by CERN. Also all products which are based on the Specifications shall visibly include the following acknowledgement:

"This product includes technical information created and made available by CERN."

LSC and LDC connectors symmetrical in new version

15 March 1996. The next version of the specification will correct the problem that the LSC and LDC connector have datalines 25 and 26 on different pin positions. We've decided to correct the LSC connector as that was the one that was not correct. The next version of the specification will have the correct pinout. This change will not have any influence for designs made by institutes outside CERN as until now only ROMB designs are made. At CERN several boards will need to be patched, but this is not a problem as they are only prototype boards.

Japanese S-LINK designer finds inconsistency

7 March 1996. Osamu Sasaki from Japan, who is designing an S-LINK based on G-LINK chips, has found an inconsistency in the S-LINK specification. On the LSC connector datalines 25 and 26 are on pins 29 and 30 respectively. On the LDC connector they are interchanged. In principle this is not a problem, but with the test tools like the SLIBOX (the S-LINK breakout box) it can become inconvenient. We are thinking about how to solve this problem.

S-LINK web pages greatly improved

29 February 1996. To make the S-LINK information more easily accessible, the web pages have undergone a major change. Now it is possible to see already from the home page which different S-LINK project are underway. For all of those projects, a description, the status and the people to contact are only one click away.

New S-LINK specification

13 February 1996. A new release of the S-LINK specification is made. Most changes were only made to clarify the specification. The only real change was that the screwholes on the suggested PCB layout are now on exactly the same as position as specified for PMC cards. This means that the holes near the connector are 68.0 mm apart, while the ones near the front edge are 69.5 mm apart. S-LINK builders beware!

CERN - High Speed Interconnect - S-LINK
Erik van der Bij - 18 February 1997