

The block diagram of the module comprises a PCI interface chip (PLX9054), a SHARC procesor, an Altera FPGA (10K10A) and a (40 MHz) S-LINK output and can also be used as programmable S-LINK data source.
| 3 June 1999 | PCB manufacture is under way, 5 assembled cards should become available in the course of July. |
| 9 July 1999 | First tests show working board |
| 14 August 1999 | Five boards working |
CERN - High Speed Interconnect
- S-LINK
Erik van der Bij - 14 September
1999