Two complementary high-speed serial link technologies have been developed within
the framework of the OMI/HIC
Esprit project. They have been subsequently standardised and form the basis
of the IEEE 1355 [1] standard:
The IEEE 1355 protocol stack defines four protocol layers: bit, character, exchange and packet layers. Characters are groups of consecutive bits which represent data or control information. The exchange layer controls the exchange of characters in order to ensure the proper functioning of a link. It includes functions such as link flow control and the link startup mechanism. A credit based flow control scheme is used which operates on a per link basis. This scheme ensures that no characters will be lost due to buffer overflow.
The devices associated with the HS-Link are fabricated with a standard 0.5 
CMOS process technology. They achieve GBaud performance from a serial link macrocell
that occupies only 1 
of silicon and consumes less than 300 mW
[2]. This is achieved through the use of an innovative delay-locked
loop (DLL) technique for the serialiser and deserialiser circuits. The use of
the DLL simplifies clock recovery and enables a high level of integration by
avoiding the need for high frequency on-chip phase-locked loop (PLL) circuits.