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6.0 Electrical Description
6.3 Clock Signal Terminations
To ensure a clean clock signal, the designer of an LSC or a ROMB should terminate the incoming clock signals (UCLK and LCLK) from the FEMB and LDC respectively. An example of a termination resistance network which may be used is shown in Figure 18
FIGURE 18. Example of a clock signal termination resistance network
The S-LINK Interface Specification - 27 MARCH 1997
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