Simple PMC to S-LINK interface
FEMB-D-33-x-5.0-65
(Circuit no. 680-1110-150)
Bottom side of PMC to S-LINK interface with PMC connectors.
The S-LINK connector is mounted at other
side of the card.
DESCRIPTION
The Simple PMC to S-LINK interface is a PCI Mezzanine Card that is needed
to interface S-LINK Link Source Cards (LSCs) in a PMC environment. The
interface itself is fully compliant to the PMC as well as the S-LINK specification.
However, when the SLINK LSC is plugged onto the SPS, the total height will
be larger than allowed by the PMC specification.
The interface was made with simplicity of design in mind. This has consequences
for the ease of programming and the maximum transfer rate that the interface
can handle. The maximum transfer rate is around 65 MByte/sec with 32-bit
SLINK interfaces.
The Simple PMC to S-LINK has Front End Motherboard (FEMB) functionality,
is a duplex implementation, with a 33 MHz UCLK frequency, having 5 Volt
signal levels and a maximum transfer rate of 65 MByte/sec. In S-LINK terms
this is coded as a FEMB-D-33-x-5.0-65.
Furthermore the interface features:
-
Programmable UDW[1..0], URESET# and UTEST# lines
-
Readable LRL[3..0] and LDOWN# lines
-
Interrupt on change of status of LRL[3..0] or LDOWN#
As far as the PMC interface goes it features:
-
33 MHz PCI clock
-
32 bit databus
-
Integrated DMA
-
Bus target and initiator functionality
STATUS
Hardware
-
Prototype in wire-wrap tested and debugged
-
14/2/96: PCB sent to fabrication, expect debugged boards back 15/3/96
-
13/3/96: PCB back from fabrication, being mounted
-
8/5/96: 3 PCBs mounted, all tested
-
8/7/96: 5 PCBs mounted, all tested. New PCB designed and will be sent 15/7/96
to INCAA for commercialisation
-
30/10/96: Another 5 PCBs are mounted and have been tested
-
18/2/97: Boards available from INCAA
Computers
-
10/7/97: INCAA Computers starts
second production run
Software
-
14/2/96: Simple software to access the board from LynxOS is written, Interrupt
handling under LynxOS must be solved
-
13/3/96: Simple link driving software is under test
-
9/4/96: Specification for driver written
-
8/5/96: Extensive test program for LynxOS written. LynxOS driver skeleton
ready, S-LINK related parts being written.
-
3/6/96: test software available on the web
-
30/10/96: newer versions of test software on web, ATLAS software being
written
-
18/2/97: ATLAS library ready
-
22/8/97: Drivers for Linux and NT are being developed
-
10/8/98: Drivers for Linux, LynxOS and NT available
DOCUMENTATION
CONTACTS
CERN - High
Speed Interconnect - S-LINK
Erik van der Bij - 12 May
2000