Design recommendations for VME boards
that make use of
S-LINK boards on a transition module
Introduction
Designers of VME boards such as the ATLAS ROD and ROB that will make use
of a VME64X transition module to receive or send S-LINK data over the P2
or P3 connectors will have to take certain precautions to ensure the quality
of the signals. The reason is that the signals must be transported over
distances of up to 30 cm and that they will pass over several connectors
and segments of transmission lines.
The following recommendations, based on extensive signal quality simulations,
will guarantee a correct functioning of the system, even with different
drivers of receivers of the signals. Basically the scheme selected will
use series termination on all critical lines, except for the clock line
which uses a parallel termination scheme as is recommended in the S-LINK
specification.
General
-
The impedance of transmission lines on the VME board lines should be between
60W and 70W (if 50W
and 75W are the only available values, 75W
should be chosen)
-
Each transmission line (notably the LCLK line) should contain maximum one
stub, that should be shorter than 3 cm
Lines connecting to a Link Destination Card mounted on the transition module
-
LCLK should be parallel terminated near the receiver (180W
to GND and 180W to Vcc)
-
UXOFF#, URESET# and URL[0..3] should be series-terminated (33W)
near the transmitter
-
LD[31..0], LCTRL#, LDERR#, LDOWN#, LWEN#, UTDO# and UDW[1..0] should
have no termination
Lines connecting to a Link Source Card mounted on the transition module
-
UD[31..0], UCTRL#, UWEN# and URESET# should be series-terminated (33W)
near the transmitter
-
UCLK, LDOWN#, LFF#, UTEST#, UDW[1..0] and LRL[3..0] should have no termination
CERN - High Speed Interconnect
- S-LINK
Silvio Orsi,
Erik
van der Bij - 13 April 2000