Initial work has been carried out to investigate the behaviour of the two silicon components described in section 3. An evaluation board containing a single 8-port RCube switch and two Bullit link adapters has been constructed. The reason for designing this board was to identify problems with the available RCube and Bullit chips and their interoperability as well as acquiring experience with the HS-Link technology. This board was designed such that long term tests at the full link data bandwidth could be carried out with different link clock frequencies, power supplies and cable types.