Application of T9000 to CPLEAR

1 Introduction


Transputer systems have been successfully used in real-time High-Energy Physics (HEP) systems for some time, for example in the ZEUS, UA6, and OPAL experiments [1]-[6].

Data acquisition and triggering systems for experiments at the Large Hadron Collider (LHC) and other demanding applications will require large-scale parallel systems [7]-[9]. In these applications, systems will primarily be based on high-speed point-to-point serial links and switches rather than shared buses. The INMOS T9000 Transputer [10] and the associated C104 packet routing chip [11] are commercially-available integrated circuits which can be used to build large networks of the type required for future experiments.

The main objective of the ESPRIT project GP-MIMD is the design and construction of large-scalable parallel computers using the T9000 and C104. As part of this project a 54-node T9000 network, using C104 packet routing switches, has been integrated into an existing 32-node T805 real-time data acquisition system in the CPLEAR experiment [11]-[12]. The T805 system was also developed as part of the GP-MIMD project.

The T9000 network operated as a processor farm running the standard CPLEAR off-line event reconstruction program. Initial experience with this prototype system are presented, together with computational and communications performance measurements.


Application of T9000 to CPLEAR - 09 NOV 95

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