HS-Links are already successfully incorporated in commercial products such as
the CCe System of parallel processors
. Several research institutions are exploring the communication possibilities
of the technologies for use in general purpose multiprocessor networks such
as the MPC project at the Universite de Paris Marie Curie (UPMC) or machines specifically designed to run simulation programs such as the RTNN
project at the Zaragoza University.
The packet level protocol of the HS-Links provides support for any number of
higher level message passing protocols which can be implemented in hardware
or software. Exploiting this property is done by the PCI-DDC [8]
chip developed at UPMC. This chip interfaces an RCube parallel port to the PCI bus and incorporates the DMA engines
necessary for running the Direct Deposit Protocol between user space in applications
running under FreeBSD and HS packets which can then be routed to any destination
processor of choice.
For future technological improvements and extended applications there are a number of ongoing efforts. Research work is underway at UPMC to increase the speed of the HS-Link macrocell and enhance the functionality of the routing technology. Work within the ARCHES project is focussing on the use of HS switching fabrics to carry Gigabit Ethernet frames and demonstrations of feasibility are expected soon.