FCS Read-out/Buffering and
Data coming from the detector electronics is normally not directly in Fibre Channel. The function of the
Readout modules is therefore to take the data from often non-standard electrical or optical links, to buffer
it and to send it out over Fibre Channel. The FC protocols that allow connectivity to a fabric have to be
implemented, so event building over a fabric can be done. There must be some intelligence in the readout
board as the destination addresses must be filled in, exception handling must be done and possibly some
verification or processing of the data can be done. See "HSI- Read-
out/Buffering and Formatting" for a general description of the functionality of the read-out
The following Read-out modules are being built:
VME or IP-based readout unit
The Euroball readout unit takes data from an ECL 16 or 32-bits wide readout bus, called DT32 and
converts it into Fibre Channel. It has 32 MByte of memory on board. The data throughput will be around
6 MB/s, and the system will be designed to handle 8 MB/s.
A dedicated I/O board takes data from the DT32 bus and connects via a 500 KByte memory to an
IndustryPack (IP) bus or PCI. The current development is based on IP and will be designed by Janos Ero
(firstname.lastname@example.org). This board fits on a Motorola processor board that gives connectivity to VME. A
commercial VME to Fibre Channel board complements the readout unit.
Possible improvements are to base all modules on PCI, in which case the full readout unit would fit on a
single VME board, or could be a commercial available workstation.
Contact: Gaetano Maron, INFN (email@example.com)
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The RD12 system is based on a dual-port memory.
See "Dual port memories and data link interfaces"
for a general description of the dual port memory.
The Fibre Channel output module is based on a Xilinx 4010 and a standard OLC, which will implement a
minimalistic FC-port. The design of it is nearly finished (September 1994). This module does not
implement the buffer-to-buffer handshake nor the end-to-end handshake, so it expects that the destination
is at any moment able to keep up with the datarate given. For incoming (ACK) frames, it will generate
R_RDYs, but no ACK frames.
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- Sergio Cittolin (Cittolin@cern.ch): DPM project.
- Adolfo Fucci (Fucci@cern.ch): implementation of the VME-based Fast Dual Port Memory (FDPM).
- Lucien Pollet (Pollet@cern.ch) or Attila Racz (Racz@cern.ch): Fibre Channel output for FDPM.
- Werner Jank (Werner.Jank@cern.ch): use of future workstations as DPM.
Erik.van_der_Bij@cern.ch - 26 September 1994